UART收发完整verilog代码

[{"title":"（ 236 个子文件 3.34MB ） UART收发完整verilog代码","children":[{"title":"isim.log <span style='color:#111;'> 567B </span>","children":null,"spread":false},{"title":"test_uart_isim_beh.exe <span style='color:#111;'> 92.50KB </span>","children":null,"spread":false},{"title":"Uart_Corr_rx.v <span style='color:#111;'> 5.87KB </span>","children":null,"spread":false},{"title":"Baud_gen.v <span style='color:#111;'> 1.70KB </span>","children":null,"spread":false},{"title":"fuse.xmsgs <span style='color:#111;'> 1.02KB </span>","children":null,"spread":false},{"title":"......","children":null,"spread":false},{"title":"<span style='color:steelblue;'>文件过多，未全部展示</span>","children":null,"spread":false}],"spread":true}]